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	<title>Lunar Lake - 版本历史</title>
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		<updated>2025-12-23T09:50:53Z</updated>

		<summary type="html">&lt;p&gt;修正笔误&lt;/p&gt;
&lt;p&gt;&lt;b&gt;新页面&lt;/b&gt;&lt;/p&gt;&lt;div&gt;{{Noteta&lt;br /&gt;
| G1 = it|zh-cn:移动;zh-hk:流動;zh-tw:行動&lt;br /&gt;
}}{{Infobox CPU&lt;br /&gt;
| name               = Lunar Lake&lt;br /&gt;
| image              = &lt;br /&gt;
| caption            = &lt;br /&gt;
| alt                = &lt;br /&gt;
| launching          = &lt;br /&gt;
| launched           = 2024年9月&lt;br /&gt;
| introduced         = 2024年9月&lt;br /&gt;
| discontinued       = &lt;br /&gt;
| designedby         = [[Intel]]&lt;br /&gt;
| designfirm         = [[Intel]]&lt;br /&gt;
| manuf1             = [[TSMC]]&lt;br /&gt;
| process1           = [[TSMC]] [[3奈米製程|N3B]]&lt;br /&gt;
| process2           = [[TSMC]] [[7奈米製程|N6]]&lt;br /&gt;
| size-from          = {{plainlist|&lt;br /&gt;
* [[TSMC]] [[3奈米製程|N3B]]&lt;br /&gt;
* [[TSMC]] [[7奈米製程|N6]]&lt;br /&gt;
  }}&lt;br /&gt;
| code               = LNL&lt;br /&gt;
| application        = Mobile&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| type               = [[Intel Core|Core Ultra]] 系列2&lt;br /&gt;
| generation         = 系列2&lt;br /&gt;
| sock1              = BGA&amp;amp;nbsp;2833&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------ Instructions &amp;amp; Architecture -------------------&amp;gt;&lt;br /&gt;
| instructions-set   = [[x86]]&lt;br /&gt;
| instructions       = [[x86-64]]&lt;br /&gt;
| extensions         = &amp;lt;!-- e.g. SSE, AVX2, AVX-512 --&amp;gt;&lt;br /&gt;
| p-core-arch        = [[Lion Cove]]&lt;br /&gt;
| e-core-arch        = Skymont&lt;br /&gt;
&lt;br /&gt;
| arch               = [[x86]]&lt;br /&gt;
{{plainlist|&lt;br /&gt;
;P-core:[[Lion Cove]]&lt;br /&gt;
;E-core :[[Skymont]]&lt;br /&gt;
}}&lt;br /&gt;
| extensions         = [[x86-64]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Cores  -------------------&amp;gt;&lt;br /&gt;
| core-codename1     = &amp;lt;!-- (1..9) Codename(s) for the CPU cores --&amp;gt;&lt;br /&gt;
| core-count         = 8 cores: &amp;lt;br/&amp;gt; {{bulleted list|4 P-cores|4 E-cores}}&lt;br /&gt;
| peak-clock         = &amp;lt;!-- Peak clock rate number, e.g. Up to 5.6 --&amp;gt;&lt;br /&gt;
| peakclock-unit     = &amp;lt;!-- Peak clock rate unit, e.g. MHz or GHz --&amp;gt;&lt;br /&gt;
| p-l0-cache         = 48{{nbsp}}KB data (per core)&lt;br /&gt;
| p-l1-cache         = 256{{nbsp}}KB (per core): &amp;lt;br/&amp;gt; {{bulleted list|64{{nbsp}}KB instructions|192{{nbsp}}KB data}}&lt;br /&gt;
| e-l1-cache         = 96{{nbsp}}KB (per core): &amp;lt;br/&amp;gt; {{bulleted list|64{{nbsp}}KB instructions|32{{nbsp}}KB data}}&lt;br /&gt;
| p-l2-cache         = 2.5{{nbsp}}MB (per core)&lt;br /&gt;
| e-l2-cache         = 4{{nbsp}}MB (per cluster)&lt;br /&gt;
| p-l3-cache         = 3{{nbsp}}MB (per core)&lt;br /&gt;
&lt;br /&gt;
| core-codename1     = &amp;lt;!-- (1..9) Codename(s) for the CPU cores --&amp;gt;&lt;br /&gt;
| numcores           = 最多8 cores：&amp;lt;br&amp;gt; （4 P-cores、4 E-cores）&lt;br /&gt;
| fastest            = &amp;lt;!-- Peak clock rate number, e.g. Up to 5.6 --&amp;gt;&lt;br /&gt;
| fast-unit          = &amp;lt;!-- Peak clock rate unit, e.g. MHz or GHz --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Graphics -------------------&amp;gt;&lt;br /&gt;
| graphics-arch      = X&amp;lt;sup&amp;gt;e&amp;lt;/sup&amp;gt;2-LPG &amp;lt;br/&amp;gt; (Battlemage)&lt;br /&gt;
| gpu-model1         = &amp;lt;!-- (1..9) Name of GPU models featured, e.g. UHD 770, UHD 630, 780M --&amp;gt;&lt;br /&gt;
| xe-count           = 8 &lt;br /&gt;
| eu-count           = 64&lt;br /&gt;
| graphics-clock     = &amp;lt;!-- Peak graphics clock for the integrated GPU, e.g. Up to 2100 MHz --&amp;gt;&lt;br /&gt;
| graphics-clockunit =&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  NPU -------------------&amp;gt;&lt;br /&gt;
| npu-arch           = NPU 4&lt;br /&gt;
| npu-tops           = Up to 48&lt;br /&gt;
| npu-clock          = &lt;br /&gt;
| npu-clockunit      = GHz&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Memory Suppport -------------------&amp;gt;&lt;br /&gt;
| memory-type        = [[LPDDR#LPDDR5X|LPDDR5X]]-8533&lt;br /&gt;
| memory-channels    = 2 channels&lt;br /&gt;
| amountmemory       = Up to 32{{nbsp}}GB&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  I/O -------------------&amp;gt;&lt;br /&gt;
| pcie-support       = [[PCI Express#PCI Express 5.0|PCIe 5.0]]&lt;br /&gt;
| pcie-lanes         = 8 lanes: &amp;lt;br/&amp;gt; {{bulleted list|4 [[PCI Express#PCI Express 5.0|PCIe 5.0]] lanes |4 [[PCI Express#PCI Express 4.0|PCIe 4.0]] lanes}}&lt;br /&gt;
| cxl-support        = &lt;br /&gt;
| upi-links          = &lt;br /&gt;
| dmi-version        = &lt;br /&gt;
| ht-version         = &lt;br /&gt;
| ht-speeds          =&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!--------- Products, models, variants -----------&amp;gt;&lt;br /&gt;
| pcode1             = LNL&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor        = [[Meteor Lake]]&lt;br /&gt;
| variant            = [[Arrow Lake]]&lt;br /&gt;
| successor          = [[Panther Lake (microprocessor)|Panther Lake]]&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&amp;#039;&amp;#039;&amp;#039;Lunar Lake&amp;#039;&amp;#039;&amp;#039;是[[英特爾]]設計的[[酷睿|Core Ultra]] 200V系列行動處理器的代號，於2024年9月發布。&amp;lt;ref&amp;gt;{{Cite web|title=Intel&amp;#039;s Next-Generation Core Ultra Launch Event on Sept. 3|url=https://www.intel.com/content/www/us/en/newsroom/news/media-alert-intels-next-gen-core-ultra-launch-event.html|website=Intel|language=en-US|access-date=2024-07-30|archive-date=2025-01-03|archive-url=https://web.archive.org/web/20250103091057/https://www.intel.com/content/www/us/en/newsroom/news/media-alert-intels-next-gen-core-ultra-launch-event.html|dead-url=no}}&amp;lt;/ref&amp;gt; 它是Meteor Lake的繼承者，英特爾從單片矽晶片轉變為分解式[[多晶片模組]]（MCM）設計。&lt;br /&gt;
&lt;br /&gt;
== 背景 ==&lt;br /&gt;
2024年5月24日，英特爾在台灣舉行的[[Computex]]電腦展上公開了「Lunar Lake」架構的詳細資訊，但並未公布這款處理器的具體型號SKU名稱或時脈速度等細節。&amp;lt;ref&amp;gt;{{cite web |last1=Wilson |first1=Matthew |date=2024-06-04 |title=Computex 2024: Intel reveals Lunar Lake CPU details |url=https://www.kitguru.net/components/cpu/matthew-wilson/computex-2024-intel-reveals-lunar-lake-cpu-details/ |website=KitGuru |language=en-GB |access-date=2024-06-04 |archive-date=2024-09-01 |archive-url=https://web.archive.org/web/20240901155111/https://www.kitguru.net/components/cpu/matthew-wilson/computex-2024-intel-reveals-lunar-lake-cpu-details/ |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== 架構 ==&lt;br /&gt;
[[File:2024-09-06 15 39 26-Intel Core Ultra Lunar Lake DEMO live HANDS-ON (DecodingIT).png|thumb|&lt;br /&gt;
Intel Core Ultra (Series 2) 的一個機型]]&lt;br /&gt;
[[File:Intel Core Ultra 258V, verbaut in einem ASUS Zenbook S 14 UX5406.png|thumb|筆記型電腦主機板中的Lunar Lake CPU]]&lt;br /&gt;
&lt;br /&gt;
Lunar Lake是超低功耗的行動SoC設計。它是15 W Meteor Lake-U處理器的的後繼產品，而[[Arrow Lake]]則取代了中階的28 W Meteor Lake-H處理器。英特爾表示，Lunar Lake的目標是「打破人們對 [[x86]] 能效不如[[ARM架構|ARM]]的成見」。&amp;lt;ref name=&amp;quot;Burek&amp;quot;&amp;gt;{{cite web |last1=Burek |first1=John |date=2024-06-04 |title=&amp;#039;Lunar Lake&amp;#039; Explained: How Intel&amp;#039;s Moonshot Mobile CPUs Will Escalate the AI Wars |url=https://uk.pcmag.com/laptops/152630/lunar-lake-explained-how-intels-moonshot-mobile-cpus-will-escalate-the-ai-wars |website=PCMag |language=en-GB |access-date=2024-06-04 |archive-date=2025-02-10 |archive-url=https://web.archive.org/web/20250210183321/https://uk.pcmag.com/laptops/152630/lunar-lake-explained-how-intels-moonshot-mobile-cpus-will-escalate-the-ai-wars |dead-url=no }}&amp;lt;/ref&amp;gt; 對Lunar Lake CPU所做的測試顯示，儘管其多核心效能在滿載狀態下並非特別優異，但在日常使用下的效率卻相當不錯。&amp;lt;ref&amp;gt;{{cite web |last1=Osthoff |first1=Andreas |title=Intel Lunar Lake CPU analysis -- The Core Ultra 7 258V&amp;#039;s multi-core performance is disappointing, but its everyday efficiency is good |url=https://www.notebookcheck.net/Intel-Lunar-Lake-CPU-analysis-The-Core-Ultra-7-258V-s-multi-core-performance-is-disappointing-but-its-everyday-efficiency-is-good.893405.0.html |website=notebookcheck.net |access-date=2024-10-11 |date=2024-09-24 |quote=After the release of the Snapdragon X Elite chips as well as the AMD Zen 5 CPUs, Intel has finally launched its new Lunar Lake mobile processors. These are completely new chips with a focus on efficiency—plus, Intel has done without hyperthreading for the first time. But how efficient are the new models really and has too much performance perhaps been sacrificed? Updated 04 October 2024 |archive-date=2025-03-30 |archive-url=https://web.archive.org/web/20250330102754/https://www.notebookcheck.net/Intel-Lunar-Lake-CPU-analysis-The-Core-Ultra-7-258V-s-multi-core-performance-is-disappointing-but-its-everyday-efficiency-is-good.893405.0.html |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== 製程 ===&lt;br /&gt;
Lunar Lake處理器是英特爾首款完全交由[[台積電]]代工生產的晶片。根據[[高盛]]的分析報告，英特爾2024年外包給台積電的金額將達$56億美元，2025年將增加至$97億美元。&amp;lt;ref&amp;gt;{{cite web |last=Shilov |first=Anton |date=2023-09-03 |title=Intel To Spend $9.7 Billion On TSMC Outsourcing In 2025: Goldman Sachs |url=https://www.tomshardware.com/news/intel-to-spend-dollar97-billion-on-tsmc-outsourcing-in-2025-goldman-sachs |website=Tom&amp;#039;s Hardware |language=en-US |access-date=2024-06-04 |archive-date=2025-03-25 |archive-url=https://web.archive.org/web/20250325135653/https://www.tomshardware.com/news/intel-to-spend-dollar97-billion-on-tsmc-outsourcing-in-2025-goldman-sachs |dead-url=no }}&amp;lt;/ref&amp;gt; 2024年3月，英特爾財務長在投資人電話會議中承認，公司「在委外晶圓製造的比重上比我們預期的比例要高一些」。&amp;lt;ref&amp;gt;{{cite web |last=Evanson |first=Nick |date=2024-03-11 |title=Intel&amp;#039;s chief financial officer admits the company is &amp;#039;heavier than we want to be in terms of external wafer manufacturing&amp;#039; |url=https://www.pcgamer.com/hardware/processors/intels-chief-financial-officer-admits-the-company-is-heavier-than-we-want-to-be-in-terms-of-external-wafer-manufacturing/ |website=PC Gamer |language=en-US |access-date=2024-06-04}}&amp;lt;/ref&amp;gt;隔月，英特爾披露其晶圓代工業務在2023年虧損達$70億美元。&amp;lt;ref&amp;gt;{{cite web |last=Bajwa |first=Arsheeya |date=2024-04-03 |title=Intel slides as foundry business loss spotlights wide gap with rival TSMC |url=https://www.reuters.com/markets/intel-slides-foundry-business-loss-spotlights-wide-gap-with-rival-tsmc-2024-04-03/ |website=Reuters |language=en-US |access-date=2024-06-04}}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable plainrowheaders&amp;quot; style=&amp;quot;text-align: left;&amp;quot;&lt;br /&gt;
! 模塊(小晶片) &lt;br /&gt;
! 製程&lt;br /&gt;
! EUV&lt;br /&gt;
! 裸晶大小&lt;br /&gt;
! {{Tooltip|參考|Reference(s)}}&lt;br /&gt;
|-&lt;br /&gt;
! scope=&amp;quot;row&amp;quot; | Compute tile&lt;br /&gt;
| [[TSMC]] [[3納米制程|N3B]]&lt;br /&gt;
| {{ya}}&lt;br /&gt;
| 140mm&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;&lt;br /&gt;
| &amp;lt;ref name=&amp;quot;Bonshor&amp;quot;&amp;gt;{{cite web |last1=Bonshor |first1=Gavin |date=2024-06-03 |title=Intel Unveils Lunar Lake Architecture: New P and E cores, Xe2-LPG Graphics, New NPU 4 Brings More AI Performance |url=https://www.anandtech.com/show/21425/intel-lunar-lake-architecture-deep-dive-lion-cove-xe2-and-npu4 |website=AnandTech |language=en-US |access-date= |archive-date=2025-04-14 |archive-url=https://web.archive.org/web/20250414225822/https://www.anandtech.com/show/21425/intel-lunar-lake-architecture-deep-dive-lion-cove-xe2-and-npu4 |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
|-&lt;br /&gt;
! scope=&amp;quot;row&amp;quot; | Platform controller tile&lt;br /&gt;
| TSMC [[7纳米制程|N6]]&lt;br /&gt;
| {{ya}}&lt;br /&gt;
| 46mm&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|-&lt;br /&gt;
! scope=&amp;quot;row&amp;quot; | Foveros interposer base tile&lt;br /&gt;
| [[Intel]] [[22纳米制程|22FFL]]&lt;br /&gt;
| {{na}}&lt;br /&gt;
| {{unknown}}&lt;br /&gt;
| &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== 計算模塊 ===&lt;br /&gt;
計算模塊是Lunar Lake最大的模塊。Lunar Lake的計算模塊內含CPU核心及其快取記憶體、GPU和NPU。上一代Meteor Lake的計算模塊採用[[7纳米制程|Intel 4]]製程，而Lunar Lake則採用台積電的[[3納米制程|N3B]]製程。&amp;lt;ref name=&amp;quot;Hachman&amp;quot;&amp;gt;{{cite web |last1=Hachman |first1=Mark |date=2024-06-03 |title=Lunar Lake deep-dive: Intel&amp;#039;s new laptop CPU is radically different |url=https://www.pcworld.com/article/2350967/intels-lunar-lake-debuts-combining-low-power-performance-and-ai.html |website=PCWorld |language=en-US |access-date=2024-06-04 |archive-date=2024-06-05 |archive-url=https://web.archive.org/web/20240605105436/https://www.pcworld.com/article/2350967/intels-lunar-lake-debuts-combining-low-power-performance-and-ai.html |dead-url=no }}&amp;lt;/ref&amp;gt; N3B是台積公司的第一代3納米製程節點。&amp;lt;ref name=&amp;quot;Hachman&amp;quot;/&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==== 神經處理器(NPU) ====&lt;br /&gt;
Lunar Lake的處理器所搭載的[[人工智能加速器|神經處理器]](NPU)採用英特爾「NPU 4」架構，時脈速度提升，可直接在晶片本地執行AI運算而非透過[[雲端運算]]。英特爾宣稱，Lunar Lake的AI工作負載量達到120 TOPS，其中NPU單獨貢獻48 TOPS，GPU提供67 TOPS，CPU則有5 TOPS。&amp;lt;ref&amp;gt;{{cite web |last1=Hardawar |first1=Devindra |date=June 4, 2024 |title=Intel officially unveils Lunar Lake, its Copilot+ AI PC chip |url=https://www.engadget.com/intel-officially-unveils-lunar-lake-its-copilot-ai-pc-chip-030029548.html?guccounter=1 |website=Engadget |language=en-GB |access-date=June 4, 2024}}&amp;lt;/ref&amp;gt;微軟要求[[Microsoft Windows|Windows]] PC的NPU效能需達到40 TOPS才能在本地運行[[Microsoft Copilot|Copilot]]。&amp;lt;ref&amp;gt;{{cite web |last=Alcorn |first=Paul |date=March 27, 2024 |title=Intel confirms Microsoft&amp;#039;s Copilot AI will soon run locally on PCs, next-gen AI PCs require 40 TOPS of NPU performance |url=https://www.tomshardware.com/pc-components/cpus/intel-confirms-microsoft-copilot-will-soon-run-locally-on-pcs-next-gen-ai-pcs-require-40-tops-of-npu-performance |website=Tom&amp;#039;s Hardware |language=en-US |access-date=June 4, 2024}}&amp;lt;/ref&amp;gt;作為對比，Meteor Lake和[[Arrow Lake]]處理器的NPU僅能提供10 TOPS的運算能力。&amp;lt;ref&amp;gt;{{cite web |last=Alcorn |first=Paul |date=April 9, 2024 |title=Intel says Lunar Lake will have 100+ TOPS of AI performance — 45 TOPS from the NPU alone meets requirement for next-gen AI PCs |url=https://www.tomshardware.com/pc-components/cpus/intel-says-lunar-lake-will-have-100-tops-of-ai-performance-45-tops-from-the-npu-alone-meeting-requirement-for-next-gen-ai-pcs |website=Tom&amp;#039;s Hardware |language=en-US |access-date=June 4, 2024}}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==== GPU ====&lt;br /&gt;
* “[[Intel Arc]]”品牌整合 &lt;br /&gt;
* 採用[[Intel Xe|X&amp;lt;sup&amp;gt;e&amp;lt;/sup&amp;gt;2]]-LPG架構&amp;lt;ref&amp;gt;{{cite web |last1=Hollister |first1=Sean |date=June 4, 2024 |title=This is Lunar Lake — Intel&amp;#039;s utterly overhauled AI laptop chip that ditches memory sticks |url=https://www.theverge.com/2024/6/3/24169115/intel-lunar-lake-architecture-platform-feature-reveal |website=The Verge |language=en-US |access-date=June 4, 2024}}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== 平台控制器模塊 ===&lt;br /&gt;
這款小型平台控制器模塊提供安全防護功能及I/O連接功能，其中就包括Wi-Fi 7、[[Thunderbolt|Thunderbolt 4]]、4條[[PCI Express|PCIe]] 4.0和4條PCIe 5.0傳輸通道。 Lunar Lake的平台控制器模塊採用與Meteor Lake及[[Arrow Lake]]的SoC模塊相同的台積電[[7纳米制程|N6]]製程技術。&amp;lt;ref name=&amp;quot;Bonshor&amp;quot;/&amp;gt;有別於Meteor Lake和Arrow Lake的SoC模塊配備兩個專用低功耗E核心的設計，Lunar Lake的平台控制器模塊未採用此設計。這是因為運算晶片從Intel 4製程轉向台積電更先進的[[3納米制程|N3B]]節點，所以可以不用這樣設計。&amp;lt;ref&amp;gt;{{cite web |title=Intel&amp;#039;s next-gen &amp;quot;Skymont&amp;quot; efficient core details leak out |url=https://videocardz.com/newz/intels-next-gen-skymont-efficient-core-details-leak-out |website=VideoCardz |language=en-US |date=May 30, 2024 |access-date=June 4, 2024}}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== 記憶體 ===&lt;br /&gt;
Lunar Lake採用[[移动DDR|LPDDR5X]]-8533內建[[随机存储器|記憶體]]，提供16GB或32GB兩種容量規格。&amp;lt;ref&amp;gt;{{cite web |last1=Norem |first1=Josh |date=May 16, 2024 |title=Intel Lunar Lake Mobile Chips to Feature 16GB or 32GB of Embedded Memory |url=https://www.extremetech.com/computing/intel-lunar-lake-mobile-chips-to-feature-16gb-or-32gb-of-embedded-memory |website=ExtremeTech |language=en-US |access-date=June 4, 2024}}&amp;lt;/ref&amp;gt;其封裝內建記憶體設計與[[蘋果公司]]M系列SoC方案類似，將記憶體整合在CPU晶片旁。&amp;lt;ref&amp;gt;{{cite web |last=Shilov |first=Anton |date=September 6, 2023 |title=Intel Demos Meteor Lake CPU with On-Package LPDDR5X |url=https://www.tomshardware.com/news/intel-demos-meteor-lake-cpu-with-on-package-lpddr5x |website=Tom&amp;#039;s Hardware |language=en-US |access-date=}}&amp;lt;/ref&amp;gt;由於記憶體距離CPU更近，這樣可以減少延遲時間。英特爾官方表示Lunar Lake的記憶體內建設計可以省下「最多250平方毫米」的空間。&amp;lt;ref name=&amp;quot;Crider&amp;quot;&amp;gt;{{cite web |last1=Crider |first1=Michael |date=June 3, 2024 |title=Intel&amp;#039;s latest laptops get rid of replaceable memory |url=https://www.pcworld.com/article/2355077/lunar-lake-tops-out-at-32gb-ram-will-not-allow-upgrades.html |website=PCWorld |language=en-US |access-date=June 4, 2024}}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Lunar Lake處理器列表 ==&lt;br /&gt;
=== 行動處理器 ===&amp;lt;!-- use core config like in the intel arc gpu list --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable sortable&amp;quot; style=&amp;quot;text-align:center; white-space:nowrap; font-size:95%&amp;quot;&lt;br /&gt;
! rowspan=&amp;quot;3&amp;quot; | Branding&lt;br /&gt;
! rowspan=&amp;quot;3&amp;quot; | SKU&lt;br /&gt;
! colspan=&amp;quot;2&amp;quot; rowspan=&amp;quot;2&amp;quot; | [[多核心處理器|核心]] &amp;lt;br/&amp;gt; ([[线程]])&lt;br /&gt;
! colspan=&amp;quot;3&amp;quot; |[[时钟频率]] (GHz)&lt;br /&gt;
! colspan=&amp;quot;2&amp;quot; rowspan=&amp;quot;2&amp;quot; | [[Intel Arc|Arc]] Graphics&lt;br /&gt;
! rowspan=&amp;quot;3&amp;quot; | [[人工智能加速器|NPU]] &amp;lt;br/&amp;gt; (TOPS)&lt;br /&gt;
! rowspan=&amp;quot;3&amp;quot; | [[CPU缓存|Smart &amp;lt;br/&amp;gt; cache]]{{efn-lr|Only the P-cores can access this L3 cache&amp;lt;ref&amp;gt;https://chipsandcheese.com/2024/09/27/lion-cove-intels-p-core-roars/&amp;lt;/ref&amp;gt;}}&lt;br /&gt;
! rowspan=&amp;quot;3&amp;quot; | RAM&lt;br /&gt;
! colspan=&amp;quot;3&amp;quot; rowspan=&amp;quot;2&amp;quot; | [[Thermal design power|TDP]]&lt;br /&gt;
! rowspan=&amp;quot;3&amp;quot; | 發佈日期&lt;br /&gt;
|-&lt;br /&gt;
! rowspan=&amp;quot;2&amp;quot; | Base&lt;br /&gt;
! colspan=&amp;quot;2&amp;quot; | [[英特尔睿频加速|Turbo]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;width:3em;&amp;quot; | {{abbr|P|Performance}}&lt;br /&gt;
! style=&amp;quot;width:3em;&amp;quot; | {{abbr|LP-E|Low Power Efficient}}&lt;br /&gt;
! style=&amp;quot;width:3em;&amp;quot; | {{abbr|P|Performance}}&lt;br /&gt;
! style=&amp;quot;width:3em;&amp;quot; | {{abbr|LP-E|Low Power Efficient}}&lt;br /&gt;
! X&amp;lt;sup&amp;gt;e&amp;lt;/sup&amp;gt; cores&amp;lt;br /&amp;gt;({{Abbr|XVEs|X&amp;lt;sup&amp;gt;e&amp;lt;/sup&amp;gt; Vector Engines}})&lt;br /&gt;
! Max. freq.&amp;lt;br /&amp;gt;(GHz)&lt;br /&gt;
! Base&lt;br /&gt;
! Turbo&lt;br /&gt;
! {{abbr|cTDP|Configurable TDP}}&lt;br /&gt;
|-&lt;br /&gt;
! Core Ultra 9&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240961/intel-core-ultra-9-processor-288v-12m-cache-up-to-5-10-ghz.html 288V]&lt;br /&gt;
| rowspan=&amp;quot;9&amp;quot; | 4 (4)&lt;br /&gt;
| rowspan=&amp;quot;9&amp;quot; | 4 (4)&lt;br /&gt;
| 3.3&lt;br /&gt;
| 5.1&lt;br /&gt;
| rowspan=&amp;quot;5&amp;quot; | 3.7&lt;br /&gt;
| rowspan=&amp;quot;5&amp;quot; | 8 (64)&lt;br /&gt;
| 2.05&lt;br /&gt;
| rowspan=&amp;quot;3&amp;quot; | 48&lt;br /&gt;
| rowspan=&amp;quot;5&amp;quot; | 12&amp;amp;nbsp;MB&lt;br /&gt;
| 32&amp;amp;nbsp;GB&lt;br /&gt;
| 30&amp;amp;nbsp;W&lt;br /&gt;
| rowspan=&amp;quot;9&amp;quot; | 37&amp;amp;nbsp;W&lt;br /&gt;
| 17-37&amp;amp;nbsp;W&lt;br /&gt;
| rowspan=&amp;quot;9&amp;quot; | {{dts|2024|September|24|format=mdy|abbr=on}}&lt;br /&gt;
|-&lt;br /&gt;
! rowspan=&amp;quot;4&amp;quot; | Core Ultra 7&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240958/intel-core-ultra-7-processor-268v-12m-cache-up-to-5-00-ghz.html 268V]&lt;br /&gt;
| rowspan=&amp;quot;4&amp;quot; | 2.2&lt;br /&gt;
| rowspan=&amp;quot;2&amp;quot; | 5.0&lt;br /&gt;
| rowspan=&amp;quot;2&amp;quot; | 2.0&lt;br /&gt;
| 32&amp;amp;nbsp;GB&lt;br /&gt;
| rowspan=&amp;quot;8&amp;quot; | 17&amp;amp;nbsp;W&lt;br /&gt;
| rowspan=&amp;quot;8&amp;quot; | 8-37&amp;amp;nbsp;W&lt;br /&gt;
|-&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240956/intel-core-ultra-7-processor-266v-12m-cache-up-to-5-00-ghz.html 266V]&lt;br /&gt;
| 16&amp;amp;nbsp;GB&lt;br /&gt;
|-&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240957/intel-core-ultra-7-processor-258v-12m-cache-up-to-4-80-ghz.html 258V]&lt;br /&gt;
| rowspan=&amp;quot;2&amp;quot; | 4.8&lt;br /&gt;
| rowspan=&amp;quot;2&amp;quot; | 1.95&lt;br /&gt;
| rowspan=&amp;quot;2&amp;quot; | 47&lt;br /&gt;
| 32&amp;amp;nbsp;GB&lt;br /&gt;
|-&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240954/intel-core-ultra-7-processor-256v-12m-cache-up-to-4-80-ghz.html 256V]&lt;br /&gt;
| 16&amp;amp;nbsp;GB&lt;br /&gt;
|-&lt;br /&gt;
! rowspan=&amp;quot;4&amp;quot; | Core Ultra 5&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240951/intel-core-ultra-5-processor-238v-8m-cache-up-to-4-70-ghz.html 238V]&lt;br /&gt;
| rowspan=&amp;quot;4&amp;quot; | 2.1&lt;br /&gt;
| rowspan=&amp;quot;2&amp;quot; | 4.7&lt;br /&gt;
| rowspan=&amp;quot;4&amp;quot; | 3.5&lt;br /&gt;
| rowspan=&amp;quot;4&amp;quot; | 7 (56)&lt;br /&gt;
| rowspan=&amp;quot;4&amp;quot; | 1.85&lt;br /&gt;
| rowspan=&amp;quot;4&amp;quot; | 40&lt;br /&gt;
| rowspan=&amp;quot;4&amp;quot; | 8&amp;amp;nbsp;MB&lt;br /&gt;
| 32&amp;amp;nbsp;GB&lt;br /&gt;
|-&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240959/intel-core-ultra-5-processor-236v-8m-cache-up-to-4-70-ghz.html 236V]&lt;br /&gt;
| 16&amp;amp;nbsp;GB&lt;br /&gt;
|-&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240955/intel-core-ultra-5-processor-228v-8m-cache-up-to-4-50-ghz.html 228V]&lt;br /&gt;
| rowspan=&amp;quot;2&amp;quot; | 4.5&lt;br /&gt;
| 32&amp;amp;nbsp;GB&lt;br /&gt;
|-&lt;br /&gt;
! [https://ark.intel.com/content/www/us/en/ark/products/240960/intel-core-ultra-5-processor-226v-8m-cache-up-to-4-50-ghz.html 226V]&lt;br /&gt;
| 16&amp;amp;nbsp;GB&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
{{notelist-lr}}&lt;br /&gt;
&lt;br /&gt;
== 參見 ==&lt;br /&gt;
*[[Zen 5微架构]]-來自AMD的競爭性x86架構&lt;br /&gt;
*[[Arrow Lake]]&lt;br /&gt;
&lt;br /&gt;
== 參考文獻 ==&lt;br /&gt;
{{reflist|30em}}&lt;br /&gt;
&lt;br /&gt;
{{Intel processors}}&lt;br /&gt;
&lt;br /&gt;
[[Category:Intel x86處理器]]&lt;br /&gt;
[[Category:x86架構]]&lt;/div&gt;</summary>
		<author><name>imported&gt;Remik1r3n</name></author>
	</entry>
</feed>