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		<summary type="html">&lt;p&gt;&lt;span class=&quot;autocomment&quot;&gt;設計概說&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;新页面&lt;/b&gt;&lt;/p&gt;&lt;div&gt;{{multiple issues|&lt;br /&gt;
{{Expand language|en|time=2023-03-17T00:01:44+00:00}}&lt;br /&gt;
{{expert|subject=电子学}}&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{noteTA&lt;br /&gt;
|G1=Electronics&lt;br /&gt;
|G2=Physics&lt;br /&gt;
|G3=IT&lt;br /&gt;
|2=zh-hans:漏极; zh-hant:汲極;&lt;br /&gt;
}}&lt;br /&gt;
{{Infobox connector &amp;lt;!-- NOTE: Not a perfect template match, but good enough for now --&amp;gt;&lt;br /&gt;
|name               = I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C总线&lt;br /&gt;
|type               = [[串列]] [[总线]]&lt;br /&gt;
|image              =&lt;br /&gt;
|logo               = &lt;br /&gt;
|caption            = &lt;br /&gt;
|designer           = [[Philips|飞利浦半导体]]，现为[[恩智浦半导体]]&lt;br /&gt;
|design_date        = {{Start date and age|1982}}&lt;br /&gt;
|manufacturer       = &lt;br /&gt;
|key_people         = &lt;br /&gt;
|production_date    = &lt;br /&gt;
|superseded         = &lt;br /&gt;
|superseded_by      =&lt;br /&gt;
|superseded_by_date =&lt;br /&gt;
|external           = &lt;br /&gt;
|hotplug            = &lt;br /&gt;
|length             = &lt;br /&gt;
|width              = &lt;br /&gt;
|height             = &lt;br /&gt;
|electrical         = &lt;br /&gt;
|ground             = &lt;br /&gt;
|maximum_voltage    = &lt;br /&gt;
|maximum_current    = &lt;br /&gt;
|data_signal        = [[集电极开路]]&lt;br /&gt;
|data_bit_width     = 1-bit (SDA) with separate clock (SCL)&lt;br /&gt;
|data_bandwidth     = 在不同模式下&amp;amp;nbsp;0.1, 0.4, 1.0, 3.4 or 5.0[[Mbps|Mbit/s]]&lt;br /&gt;
|data_devices       = &lt;br /&gt;
|data_style         = [[串列通訊|串列]], [[半双工]]&lt;br /&gt;
|cable              = &lt;br /&gt;
|physical_connector = &lt;br /&gt;
|num_pins           = &lt;br /&gt;
|pinout_col1_name   =&lt;br /&gt;
|pinout_col2_name   =&lt;br /&gt;
|pinout_image       = &lt;br /&gt;
|pinout_caption     = &lt;br /&gt;
|pinout_notes       =&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- [[File:I2clogo.jpg|right]] --&amp;gt;&lt;br /&gt;
[[File:I2C.svg|thumb|300px|right|I2C bus]]&lt;br /&gt;
&amp;#039;&amp;#039;&amp;#039;I²C&amp;#039;&amp;#039;&amp;#039;（&amp;#039;&amp;#039;&amp;#039;Inter-Integrated Circuit&amp;#039;&amp;#039;&amp;#039;）字面上的意思是&amp;#039;&amp;#039;&amp;#039;積體電路之間&amp;#039;&amp;#039;&amp;#039;，它其實是&amp;#039;&amp;#039;&amp;#039;I²C Bus&amp;#039;&amp;#039;&amp;#039;簡稱，所以中文應該叫&amp;#039;&amp;#039;&amp;#039;-{zh-hant:積體匯流排電路;zh-hans:集成电路总线}-&amp;#039;&amp;#039;&amp;#039;，它是一種-{zh:串列;zh-hant:串列;zh-hans:串行}-通訊[[匯流排 (數據)|匯流排]]，使用多主從架構，由[[飛利浦]]公司在1980年代為了讓[[主機板]]、[[嵌入式系統]]或[[手機]]用以連接低速週邊裝置而發展。I²C的正確讀法為“I平方C”（&amp;quot;I-squared-C&amp;quot;），而“I二C”（&amp;quot;I-two-C&amp;quot;）則是另一種錯誤但被廣泛使用的讀法。自2006年10月1日起，使用I²C協定已經不需要支付專利費，但製造商仍然需要付費以取得I²C從屬裝置位址&amp;lt;ref&amp;gt;{{cite web |url=http://www.nxp.com/documents/application_note/AN10216.pdf |title=I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C Licensing Information |website=nxp.com |access-date=2018-04-29 |archive-url=https://web.archive.org/web/20170110165928/http://www.nxp.com/documents/application_note/AN10216.pdf |archive-date=2017-01-10 |dead-url=no }}&amp;lt;/ref&amp;gt;。&lt;br /&gt;
&lt;br /&gt;
== 設計概說 ==&lt;br /&gt;
* 一般 I²C 晶片常用的傳輸格式有下列二種:&lt;br /&gt;
(啟始)-[控制]-[指令]-[資料]-(結束)&amp;lt;br&amp;gt;&lt;br /&gt;
(啟始)-[控制0]-[指令]-(r啟始)-[控制1]-[資料]-(結束)&amp;lt;br&amp;gt;&lt;br /&gt;
&lt;br /&gt;
[[File:Iicrp.png|thumb|right|I²C-Bus]]&lt;br /&gt;
[[File:I2C.svg|thumb|350px|一個由單一主控端（一個[[微控制器]]）及三個從屬節點（一個[[類比數位轉換器]]）、一個[[數位類比轉換器]]以及一另一個微控制器）所構成，並使用了[[上拉電阻]]R&amp;lt;sub&amp;gt;p&amp;lt;/sub&amp;gt;。]]&lt;br /&gt;
&lt;br /&gt;
I²C只使用兩條雙向[[漏极开路]]（Open Drain）线，其中一条线为传输数据的-{zh:串列;zh-hant:串列;zh-hans:串行}-資料线（SDA, Serial DAta line），另一条线是启动或停止传输以及发送时钟序列的-{zh:串列;zh-hant:串列;zh-hans:串行}-時脈（SCL, Serial CLock line）线，这两条线都必須外接[[上拉電阻]]&amp;lt;ref name=&amp;quot;i2c-spec&amp;quot;&amp;gt;{{cite web |title=I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C-bus specification |version=Rev 6 |url=http://www.nxp.com/documents/user_manual/UM10204.pdf |publisher=[[NXP Semiconductors]] |archive-url=https://web.archive.org/web/20140725091437/http://www.nxp.com/documents/user_manual/UM10204.pdf |archive-date=2014-07-25 |date=April 4, 2014 |accessdate=2015-11-02 |dead-url=no }}&amp;lt;/ref&amp;gt;。I²C允許相當大的工作電壓範圍，但典型的電壓準位為+3.3V或+5V。&lt;br /&gt;
&lt;br /&gt;
I²C的參考設計使用一個7位元長度的[[位址空間]]但保留了16個位址，所以在一組匯流排最多可和112個節點通訊{{efn|應該為2&amp;lt;sup&amp;gt;7&amp;lt;/sup&amp;gt;＝128個，但是其中16個指令具有特殊定義，所以剩下112。}}。常見的I²C匯流排依傳輸速率的不同而有不同的模式：&amp;#039;&amp;#039;標準模式&amp;#039;&amp;#039;（100 kbit/s）、&amp;#039;&amp;#039;低速模式&amp;#039;&amp;#039;（10 kbit/s），但時脈頻率可被允許下降至零，這代表可以暫停通訊。而新一代的I²C匯流排可以和更多的節點（支援10位元長度的位址空間）以更快的速率通訊：&amp;#039;&amp;#039;快速模式&amp;#039;&amp;#039;（400 kbit/s）、&amp;#039;&amp;#039;快速+模式&amp;#039;&amp;#039;（1 Mbit/s）&amp;#039;&amp;#039;高速模式&amp;#039;&amp;#039;（3.4 Mbit/s）&amp;#039;&amp;#039;超高速模式&amp;#039;&amp;#039;（5 Mbit/s）。&lt;br /&gt;
&lt;br /&gt;
雖然最大的節點數目是被位址空間所限制住，但實際上也會被匯流排上的總[[電容]]所限制住，一般而言為400 pF。&lt;br /&gt;
&lt;br /&gt;
[[File:I2C data transfer.svg|center|600px|Data transfer sequence]]&lt;br /&gt;
&amp;lt;!-- ===Reference design===&lt;br /&gt;
The reference design, as mentioned above, is a bus with a clock (SCL) and data (SDA) lines with 7-bit addressing.&lt;br /&gt;
The bus has two types of nodes: master and slave:&lt;br /&gt;
* Master node — node that controls the clock&lt;br /&gt;
* Slave node — node that is not in control of the clock line.&lt;br /&gt;
The bus is a [[multi-master bus]] which means any number of master nodes can be present.&lt;br /&gt;
Additionally, a master can also be a slave, and vice-versa.&lt;br /&gt;
&lt;br /&gt;
Overall, there are four distinct modes for a given bus:&lt;br /&gt;
* master transmit — the node is in control of the clock and is sending data to a slave&lt;br /&gt;
* master receive — the node is in control of the clock but is receiving data from a slave&lt;br /&gt;
* slave transmit — the node is not in control of the clock but is sending data to a master&lt;br /&gt;
* slave receive — the node is not in control of the clock but is receiving data from the master&lt;br /&gt;
&lt;br /&gt;
The master is initially in master transmit mode by sending a [[start bit]] followed by the 7-bit address of the slave it wishes to communicate with it which is finally followed by a single bit representing whether it wishes to write or read (aka send or receive) to the slave.&lt;br /&gt;
If the slave exists on the bus then it will respond with an [[ACK (computing)|ACK]] bit (acknowledge).&lt;br /&gt;
&lt;br /&gt;
The address and the data bytes are sent [[most significant bit]] first.&lt;br /&gt;
The start bit is indicated by a high-&amp;gt;low transition of SDA with SCL high; the stop bit is indicated by a low-&amp;gt;high transition of SDA with SCL high.&lt;br /&gt;
&lt;br /&gt;
If the master wishes to write to the slave then it repeatedly sends a byte with the slave sending an ACK bit.  (In this situation, the master is in master transmit and the slave is in slave receive mode.)&lt;br /&gt;
&lt;br /&gt;
If the master wishes to read from the slave then it repeatedly receives a byte from the slave until the slave sends a [[NACK]] bit.&lt;br /&gt;
This means the slave sends an ACK bit for every byte but the last one.  (In this situation, the master is in master receive and the slave is in slave transmit mode.)&lt;br /&gt;
&lt;br /&gt;
The master then ends transmission with a [[stop bit]] or can send a START bit, instead, if it wishes to retain control of the bus for another transfer.&lt;br /&gt;
&lt;br /&gt;
===Physical layer===&lt;br /&gt;
At the [[physical layer]], both SCL &amp;amp; SDA lines are of [[open-collector]] design, thus, [[pull-up resistor]]s are needed.&lt;br /&gt;
Pulling the line to ground is considered a logical zero while letting the line float is a logical one.&lt;br /&gt;
This is used as a [[channel access method]].&lt;br /&gt;
&lt;br /&gt;
When one node is transmitting a logical one (i.e., letting the line float to Vdd) and another transmits a logical zero then the first node can sense this because the line is not in a logical one state — it is not floating to Vdd.&lt;br /&gt;
This is [[arbitration]] for I²C since it is a [[multi-master bus]].&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
=== 参考设计 ===&lt;br /&gt;
&lt;br /&gt;
I²C仅使用两个双向开漏线，-{zh:串列;zh-hant:串列;zh-hans:串行}-数据线（SDA）和-{zh:串列;zh-hant:串列;zh-hans:串行}-时钟线（SCL），以及上拉电阻。使用的典型电压是+5 V或+3.3 V（虽然其他电压系统也是允许的）。&lt;br /&gt;
&lt;br /&gt;
在I²C参考设计中，使用7或10位（取决于所使用的设备）地址空间。普通I²C总线速度为100 kbit / s的标准模式和10 kbit / s的低速模式，但任意低时钟频率也是允许的。 I²C的最新修订可以承载更多的节点，并以更快的速度运行{{efn|400 kbit / s的快速模式，1 Mbit / s的快速模式加上或FM +和3.4 Mbit / s的高速模式}}。这些速度被更广泛地使用在嵌入式系统中而不是PC上。I²C也有其他的特性，例如16位寻址。&lt;br /&gt;
&lt;br /&gt;
请注意，这里引用的比特率为主节点和从节点之间没有时钟延长或其他硬件开销的传输比特率。协议开销包括一个字节从地址（或许还有从设备内部寄存器地址）以及每个字节的ACK / NACK比特。因此这意味着，用户数据的实际传输速率要低于峰值比特率。例如，如果与从设备以低效的每次仅一个字节数据进行传输，数据率将比峰值比特率少于一半（因为其余的时钟需要发送一个字节地址和ACK比特）。&lt;br /&gt;
&lt;br /&gt;
节点的最大数量受限于地址空间以及400 [[法拉|pF]]的总总线[[电容]]。400 pF总电容也限制了实际通訊距离只有几米。&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- ===Reference design===&lt;br /&gt;
The before mentioned reference design is a bus with a [[Clock signal|clock]] (SCL) and data (SDA) lines with 7-bit addressing. The bus has two roles for nodes: master and slave:&lt;br /&gt;
&lt;br /&gt;
* Master node &amp;amp;mdash; node that generates the clock and initiates communication with slaves&lt;br /&gt;
* Slave node &amp;amp;mdash; node that receives the clock and responds when addressed by the master&lt;br /&gt;
&lt;br /&gt;
The bus is a [[multi-master bus]] which means any number of master nodes can be present. Additionally, master and slave roles may be changed between messages (after a STOP is sent).&lt;br /&gt;
&lt;br /&gt;
There may be four potential modes of operation for a given bus device, although most devices only use a single role and its two modes:&lt;br /&gt;
&lt;br /&gt;
* master [[Transmission (telecommunications)|transmit]] &amp;amp;mdash; master node is sending data to a slave&lt;br /&gt;
* master receive &amp;amp;mdash; master node is receiving data from a slave&lt;br /&gt;
* slave transmit &amp;amp;mdash; slave node is sending data to the master&lt;br /&gt;
* slave receive &amp;amp;mdash; slave node is receiving data from the master&lt;br /&gt;
&lt;br /&gt;
The master is initially in master transmit mode by sending a [[start bit]] followed by the 7-bit address of the slave it wishes to communicate with, which is finally followed by a single bit representing whether it wishes to write(0) to or read(1) from the slave.&lt;br /&gt;
&lt;br /&gt;
If the slave exists on the bus then it will respond with an [[acknowledgement (data networks)|ACK]] bit (active low for acknowledged) for that address. The master then continues in either transmit or receive mode (according to the read/write bit it sent), and the slave continues in its complementary mode (receive or transmit, respectively).&lt;br /&gt;
&lt;br /&gt;
The address and the data bytes are sent [[most significant bit]] first.&lt;br /&gt;
The start bit is indicated by a high-to-low transition of SDA with SCL high; the stop bit is indicated by a low-to-high transition of SDA with SCL high.  All other transitions of SDA take place with SCL low.&lt;br /&gt;
&lt;br /&gt;
If the master wishes to write to the slave then it repeatedly sends a byte with the slave sending an ACK bit. (In this situation, the master is in master transmit mode and the slave is in slave receive mode.)&lt;br /&gt;
&lt;br /&gt;
If the master wishes to read from the slave then it repeatedly receives a byte from the slave, the master sending an ACK bit after every byte but the last one. (In this situation, the master is in master receive mode and the slave is in slave transmit mode.)&lt;br /&gt;
&lt;br /&gt;
The master then either ends transmission with a [[stop bit]], or it may send another START bit if it wishes to retain control of the bus for another transfer (a &amp;quot;combined message&amp;quot;).&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&amp;lt;!-- 翻译自英文版本的Reference design --&amp;gt;&lt;br /&gt;
如上所述，参考设计为使用-{zh:串列;zh-hant:串列;zh-hans:串行}-数据线（SDA）和-{zh:串列;zh-hant:串列;zh-hans:串行}-时钟线（SCL）、拥有7位元寻址空间的总线。&lt;br /&gt;
总线上有两种类型角色的节点：&lt;br /&gt;
* 主节点 - 产生时钟并发起与从节点的通訊&lt;br /&gt;
* 从节点 - 接收时钟并响应主节点的寻址&lt;br /&gt;
&lt;br /&gt;
该总线是一种[[multi-master bus|多主控总线]]，即可以在总线上放置任意多主节点。此外，在[[stop bit|停止位元]]（STOP）发出后，一个主节点也可以成为从节点，反之亦然。&lt;br /&gt;
&lt;br /&gt;
总线上有四种不同的操作模式，虽然大部分设备只作为一种角色和使用其中两种操作模式：&lt;br /&gt;
* 主节点发送 - 主节点发送数据给从节点&lt;br /&gt;
* 主节点接收 - 主节点接收从节点数据&lt;br /&gt;
* 从节点发送 - 从节点发送数据给主节点&lt;br /&gt;
* 从节点接收 - 从节点接收主节点数据&lt;br /&gt;
&lt;br /&gt;
一开始，主节点处于主节点发送模式，发送[[start bit|起始位元]]（START），跟着发送希望与之通訊的从节点的7位元地址，最后再发送1位读写位元，该位元表示主节点想要与从节点进行读（1）还是写（0）操作。&lt;br /&gt;
&lt;br /&gt;
如果从节点在总线上，它将以[[ACK字元]]应答（低態觸發）该地址。主节点收到应答后，根据它发送的读写位元，处于发送模式或者接收模式，从节点则处于对应的相反模式（接收或发送）。&lt;br /&gt;
&lt;br /&gt;
地址和数据首先发送[[最高有效位]]。&lt;br /&gt;
起始位元在SCL为高时，由SDA上準位从高变低表示；停止位元在SCL为高时，由SDA上準位从低变高表示。其他SDA上的準位变化在SCL为低时发生。&lt;br /&gt;
&lt;br /&gt;
如果主节点想要向从节点写数据，它将发送一个字节，然后从节点以ACK位元应答，如此重复。此时，主节点处于&amp;#039;&amp;#039;&amp;#039;主节点发送&amp;#039;&amp;#039;&amp;#039;模式，从节点处于&amp;#039;&amp;#039;&amp;#039;从节点接收&amp;#039;&amp;#039;&amp;#039;模式。&lt;br /&gt;
&lt;br /&gt;
如果主节点想要读取从节点数据，它将不断接收从节点发送的一个个字节，在收到每个字节后发送ACK进行应答，除了接收到的最后一个字节。此时，主节点处于&amp;#039;&amp;#039;&amp;#039;主节点接收&amp;#039;&amp;#039;&amp;#039;模式，从节点处于&amp;#039;&amp;#039;&amp;#039;从节点发送&amp;#039;&amp;#039;&amp;#039;模式。&lt;br /&gt;
&lt;br /&gt;
此后，主节点不是发送停止位元终止传输，就是发送另一个起始位元以发起另一次传输（即“组合消息”）。&lt;br /&gt;
&lt;br /&gt;
== 修訂 ==&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+ I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C规范的历次修订&lt;br /&gt;
! 年份&lt;br /&gt;
! 版本&lt;br /&gt;
! 最高速度&lt;br /&gt;
! 注解&lt;br /&gt;
! PDF&lt;br /&gt;
|-&lt;br /&gt;
| 1982&lt;br /&gt;
| Original &lt;br /&gt;
| 100&amp;amp;nbsp;kbit/s &lt;br /&gt;
| 当时的I²C系統是一種簡單的內部匯流排系統，當時主要的用途在於控制由飛利浦所生產的晶片。&lt;br /&gt;
| n/a&lt;br /&gt;
|-&lt;br /&gt;
| 1992&lt;br /&gt;
| 1 &lt;br /&gt;
| 400&amp;amp;nbsp;kbit/s &lt;br /&gt;
| 新增了傳輸速率為400 kbit/s的&amp;#039;&amp;#039;快速模式&amp;#039;&amp;#039;及長度為10位元的-{zh:定址;zh-hant:定址;zh-hans:地址}-模式，该模式下可容納最多1008個節點。这是最初的標準版本。&lt;br /&gt;
| n/a&lt;br /&gt;
|-&lt;br /&gt;
| 1998&lt;br /&gt;
| 2 &lt;br /&gt;
| 3.4&amp;amp;nbsp;Mbit/s &lt;br /&gt;
| 新增了傳輸速率為3.4Mbit/s的&amp;#039;&amp;#039;高速模式&amp;#039;&amp;#039;，並減小总线需要的電壓及電流以節省能源。&lt;br /&gt;
| n/a&lt;br /&gt;
|-&lt;br /&gt;
| 2000&lt;br /&gt;
| 2.1 &lt;br /&gt;
| 3.4&amp;amp;nbsp;Mbit/s &lt;br /&gt;
| 仅對2.0版做一些小修正，功能并无变化。&lt;br /&gt;
| &amp;lt;ref name=&amp;quot;i2c-spec-2.1&amp;quot;&amp;gt;{{Cite web |url=http://www.nxp.com/acrobat_download/literature/9398/39340011.pdf |title=I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C-bus specification Rev 2.1; Philips Semiconductors; January 2000; Archived. |accessdate=2007-02-12 |archive-date=2007-02-12 |archive-url=https://web.archive.org/web/20070212223025/http://www.nxp.com/acrobat_download/literature/9398/39340011.pdf |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
|-&lt;br /&gt;
| 2007&lt;br /&gt;
| 3 &lt;br /&gt;
| 3.4&amp;amp;nbsp;Mbit/s &lt;br /&gt;
| 新增了&amp;#039;&amp;#039;高速+&amp;#039;&amp;#039;模式，这一模式需要20&amp;amp;nbsp;mA的电流来驱动。添加设备ID机制。&lt;br /&gt;
| &amp;lt;ref name=&amp;quot;i2c-spec-3&amp;quot;&amp;gt;{{Cite web |url=http://www.nxp.com/documents/user_manual/UM10204.pdf |title=I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C-bus specification Rev 3; NXP Semiconductors; June 19, 2007; Archived. |accessdate=2012-02-07 |archive-date=2012-02-07 |archive-url=https://web.archive.org/web/20120207003629/http://www.nxp.com/documents/user_manual/UM10204.pdf |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
|-&lt;br /&gt;
| 2012&lt;br /&gt;
| 4 &lt;br /&gt;
| 5&amp;amp;nbsp;Mbit/s &lt;br /&gt;
| 增加5 MHz的超快速模式（UFM），这种模式是[[单工通信|单工模式]]。使用带有[[推挽输出]]的新型USDA和USCS线，这两条线上不再有[[上拉电阻]]。增加了制造商指定的ID表。&lt;br /&gt;
| &amp;lt;ref name=&amp;quot;i2c-spec-4&amp;quot;&amp;gt;{{Cite web |url=http://www.nxp.com/documents/user_manual/UM10204.pdf |title=I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C-bus specification Rev 4; NXP Semiconductors; February 13, 2012; Archived. |accessdate=2012-05-02 |archive-date=2012-05-02 |archive-url=https://web.archive.org/web/20120502134707/http://www.nxp.com/documents/user_manual/UM10204.pdf |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
|-&lt;br /&gt;
| 2012&lt;br /&gt;
| 5 &lt;br /&gt;
| 5&amp;amp;nbsp;Mbit/s &lt;br /&gt;
| 修正错误。&lt;br /&gt;
| &amp;lt;ref name=&amp;quot;i2c-spec-5&amp;quot;&amp;gt;{{Cite web |url=http://www.nxp.com/documents/user_manual/UM10204.pdf |title=I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C-bus specification Rev 5; NXP Semiconductors; October 9, 2012; Archived. |accessdate=2012-10-17 |archive-date=2012-10-17 |archive-url=https://web.archive.org/web/20121017153327/http://www.nxp.com/documents/user_manual/UM10204.pdf |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
|-&lt;br /&gt;
| 2014&lt;br /&gt;
| 6 &lt;br /&gt;
| 5&amp;amp;nbsp;Mbit/s &lt;br /&gt;
| 修正两幅图。这是目前最新的标准。&lt;br /&gt;
| &amp;lt;ref name=&amp;quot;i2c-spec&amp;quot;/&amp;gt;&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== 應用 ==&lt;br /&gt;
[[File:Medion MD8910 - STMicroelectronics 24C08-8003.jpg|thumb|[[STMicroelectronics]] 24C08: Serial [[EEPROM]] with I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C bus&amp;lt;ref&amp;gt;{{cite web |title=8-Kbit serial I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C bus EEPROM (PDF) |url=https://www.st.com/resource/en/datasheet/m24c08-f.pdf |website=STMicroelectronics |access-date=19 November 2019 |archive-url=https://web.archive.org/web/20191018114246/https://www.st.com/resource/en/datasheet/m24c08-f.pdf|archive-date=2019-10-18 |date=October 2017 |dead-url=no }}&amp;lt;/ref&amp;gt;]]&lt;br /&gt;
[[File:16bit ADC Card.jpg|thumb|A 16-bit [[Analog-to-digital converter|ADC]] board with I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C interface]]&lt;br /&gt;
I²C被應用在构造簡單且可以牺牲傳輸速度来降低製造成本的-{zh:週邊;zh-hant:週邊;zh-hans:外设}-上。一些常見的應用如下：&lt;br /&gt;
&lt;br /&gt;
* 為了保存使用者的設定而存取[[NVRAM]]晶片。&lt;br /&gt;
* 存取低速的[[數位類比轉換器]]（DAC）和[[類比數位轉換器]]（ADC）。&lt;br /&gt;
* 改變監視器的對比度、色調及色彩平衡設定（[[VESA显示数据频道]]）。&lt;br /&gt;
* 控制小型[[液晶屏幕|液晶]]或[[OLED]]屏幕。&lt;br /&gt;
* 改變音量大小。&lt;br /&gt;
* 取得硬體監視及診斷資料，例如中央處理器的溫度及風扇轉速。&lt;br /&gt;
* 讀取[[实时时钟]]（Real-time clock）。&lt;br /&gt;
* 在系統設備中用來開啟或關閉電源供應。&amp;lt;ref&amp;gt;{{cite web |title=Benefits of Power Supplies Equipped with I2C Ethernet Communications |url=http://aegispower.com/index.php/2015-01-15-19-35-10/178-benefits-of-power-supplies-equipped-with-i2c-ethernet-communications |website=Aegis Power Systems, Inc. |publisher=Aegis Power Systems, Inc. |access-date=2015-12-21 |archive-url=https://web.archive.org/web/20151222123810/http://aegispower.com/index.php/2015-01-15-19-35-10/178-benefits-of-power-supplies-equipped-with-i2c-ethernet-communications |archive-date=2015-12-22 |dead-url=no }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
I²C的一個优势在於其接腳数少。通过两个[[GPIO|接腳]]以及相应的软件，[[微控制器]]就可以控制某一个网络内的设备，而使用其他技术则需要更多的接腳。而且，较少的接腳数可以减小封装尺寸，进而減少重量及電源的消耗，這對於[[行動電話]]及手持式電腦而言格外重要。由于電腦工程師發現到對於整合電路設計而言，許多的製造成本源自於封裝尺寸及接腳數量，因而像I²C這樣的匯流排受到了广泛应用。&lt;br /&gt;
&lt;br /&gt;
-{zh:週邊;zh-hant:週邊;zh-hans:外设}-可以在系統仍然在運作的同時加入或移出匯流排，這代表對於有[[熱插拔]]需求的裝置而言是個理想的匯流排。&lt;br /&gt;
&lt;br /&gt;
* arduino mega上的pin腳&lt;br /&gt;
* raspberry pi 4 上的pin腳&lt;br /&gt;
可參考arduino mega 轉 raspberry pi 4 i2c 3v轉5v的轉換電路&lt;br /&gt;
&lt;br /&gt;
== 操作系統的支援 ==&lt;br /&gt;
在[[Linux]]中，I²C已經列入了-{zh:核心模組;zh-hant:核心模組;zh-hans:内核模块}-的支援了，更進一步的說明可以參考-{zh:核心;zh-hant:核心;zh-hans:内核}-相關的文件及位於/usr/include/linux/i2c.h 的這個[[標頭檔]]。[[OpenBSD]]則在最近的更新中加入了I²C的架構（framework）以支援一些常見的主控端控制器及-{zh:感應器;zh-hant:感應器;zh-hans:传感器}-。&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
In [[Sinclair QDOS]] and [[Minerva (QDOS reimplementation)|Minerva]] [[Sinclair QL|QL]] [[operating systems]] I²C is supported via a set of extensions provided by [[TF Services]].&lt;br /&gt;
&lt;br /&gt;
In [[AmigaOS]] the shared library &amp;#039;&amp;#039;i2c.library&amp;#039;&amp;#039; of Wilhelm Noeker allows I²C access.&lt;br /&gt;
&lt;br /&gt;
[[eCos]] supports I²C for several hardware architectures.&lt;br /&gt;
&lt;br /&gt;
== Derivative Technologies ==&lt;br /&gt;
&lt;br /&gt;
I²C is the basis for the [[ACCESS.bus]], the [[VESA]] [[Display Data Channel]] (DDC) interface, the [[System Management Bus]] (SMBus), and the Intelligent Platform Management Bus (IPMB, one of the protocols of [[Intelligent Platform Management Interface|IPMI]]).  These implementations have differences in voltage and clock frequency ranges, and may have [[interrupt request|interrupt lines]].&lt;br /&gt;
 --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== 工具开发 ==&lt;br /&gt;
=== I²C主机适配器 ===&lt;br /&gt;
=== I²C协议分析仪 ===&lt;br /&gt;
=== 逻辑分析仪 ===&lt;br /&gt;
&lt;br /&gt;
== 限制 ==&lt;br /&gt;
i2c在容易線長導致訊號品質不佳，速度越快能用的距離越短(一般約在10公分上下)，上拉電阻用小一點可能有幫助&amp;lt;br&amp;gt;&lt;br /&gt;
&lt;br /&gt;
i2c阻抗50,usb阻抗100在做訊號轉換時阻抗不匹配會造成訊號極差&amp;lt;br&amp;gt;&lt;br /&gt;
*上升電阻計算:&lt;br /&gt;
&lt;br /&gt;
== 衍生技术 ==&lt;br /&gt;
== 參見 ==&lt;br /&gt;
{{Portal|电子学}}&lt;br /&gt;
* [[序列周邊介面]]&lt;br /&gt;
* [[I²S]]&lt;br /&gt;
* [[1-Wire]] Bus&lt;br /&gt;
* [[Serial Peripheral Interface Bus]]&lt;br /&gt;
* [[SMBus]]&lt;br /&gt;
&lt;br /&gt;
== 參考資料 ==&lt;br /&gt;
{{reflist}}&lt;br /&gt;
&lt;br /&gt;
== 註釋 ==&lt;br /&gt;
{{notelist|iger=}}&lt;br /&gt;
&lt;br /&gt;
== 外部連結 ==&lt;br /&gt;
* [http://www.nxp.com/documents/user_manual/UM10204.pdf Philips I2C specifications]{{Wayback|url=http://www.nxp.com/documents/user_manual/UM10204.pdf |date=20130511150526 }}&lt;br /&gt;
* [http://www.i2c-bus.org/ Detailed introduction, Primer] {{Wayback|url=http://www.i2c-bus.org/ |date=20201212104553 }}&lt;br /&gt;
* [https://web.archive.org/web/20070926222250/http://embedded.com/story/OEG20010718S0073 Introduction to I2C]&lt;br /&gt;
* [http://www.interfacebus.com/Design_Connector_I2C.html I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C Bus / Access Bus] {{Wayback|url=http://www.interfacebus.com/Design_Connector_I2C.html |date=20200718131532 }}&lt;br /&gt;
* [http://www.linuxjournal.com/article/1342 Using the I2C Bus with Linux] {{Wayback|url=http://www.linuxjournal.com/article/1342 |date=20201201065448 }}&lt;br /&gt;
* [http://www.openbsd.org/cgi-bin/man.cgi?query=iic&amp;amp;sektion=4 OpenBSD iic(4) manual page]{{Dead link|date=2019年10月 |bot=InternetArchiveBot |fix-attempted=yes }}&lt;br /&gt;
* Linux package [https://web.archive.org/web/20061221033646/http://lm-sensors.org/ lm-sensors] support I2C bus among others.&lt;br /&gt;
* [http://techref.massmind.org/i2cs.htm massmind i2c page] {{Wayback|url=http://techref.massmind.org/i2cs.htm |date=20081007101600 }} Source code, samples and technical information for using i2c with PC, PIC and SX microcontrollers.&lt;br /&gt;
* [https://web.archive.org/web/20061230193623/http://tmd.havit.cz/Papers/I2C.pdf I&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;C bus]&lt;br /&gt;
* [http://www.epanorama.net/links/serialbus.html Serial buses information page]{{Wayback|url=http://www.epanorama.net/links/serialbus.html |date=20080719114000 }}&lt;br /&gt;
* [http://www.esacademy.com/faq/i2c/ I2C Bus Technical Overview and Frequently Asked Questions] {{Wayback|url=http://www.esacademy.com/faq/i2c/ |date=20090806082509 }}&lt;br /&gt;
* [https://web.archive.org/web/20070102155852/http://www.kar.elf.stuba.sk/predmety/mmp/i2c/i2cindex.htm The I2C Faq Version 2.0]&lt;br /&gt;
* [https://web.archive.org/web/20161013012648/http://www.bus-buffer.com/ The Bus Buffer Resource. For 2-wire buses such as I2C, SMBus, PMBus, IPMB &amp;amp; IPMI]&lt;br /&gt;
* [https://web.archive.org/web/20110929112725/http://www.nxp.com/products/interface_control/i2c/licensing/ I2C Licensing Information]&lt;br /&gt;
&lt;br /&gt;
{{Computer-bus}}&lt;br /&gt;
&lt;br /&gt;
[[Category:串行总线]]&lt;/div&gt;</summary>
		<author><name>imported&gt;Innova</name></author>
	</entry>
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