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ARM Cortex-X2 - 版本历史
2026-06-30T20:02:20Z
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2026-03-27T17:47:46Z
<p>增加或調整分類</p>
<p><b>新页面</b></p><div>{{專家|subject2=電子學|subject=計算機科學}}<br />
{{NoteTA|G1=IT}}<br />
{{Infobox CPU|name=ARM Cortex-X2|size-from=|qpi-fast-unit=|dmi-slowest=|slow-unit=|dmi-slow-unit=|arch=ARMv9-A|l1cache={{Nowrap|128 [[Kibibyte|KiB]]}} {{Small|({{Nowrap|64 KiB}} [[I-cache]] with parity, {{Nowrap|64 KiB}} [[D-cache]])}} 每核|l2cache={{Nowrap|512–1024 KiB}} 每核|l3cache={{Nowrap|512 KiB – 8 MiB}} {{Small|(optional)}}|application=|size-to=|qpi-fastest=|microarch=ARM Cortex-X2|dmi-fast-unit=|extensions=<!----------- Physical specifications ------------>|numcores=|pack1=|sock1=<!--------- Products, models, variants ----------->|core1=|brand1=<!-- brand1..9 -->|variant=[[ARM Cortex-A710]]<br />
<!------------------ History ------------------->|predecessor=[[ARM Cortex-X1]]|qpi-slow-unit=|qpi-slowest=|fast-unit=|code=<!----------------- Performance ------------------>|image_size=|alt=|caption=<!----------------- General Info ----------------->|produced-start=2021|produced-end=|soldby=|designfirm=<nowiki>由安謀控股</nowiki>|manuf1=|cpuid=|slowest=2.84 [[GHz]]<ref name=AnandTech>{{cite web |url=https://www.anandtech.com/show/17102/snapdragon-8-gen-1-performance-preview-sizing-up-cortex-x2/2#:~:text=The%20small%20frequency%20bump%20from,efficiency%20when%20running%20these%20workloads. |title=The Snapdragon 8 Gen 1 Performance Preview: Sizing Up Cortex-X2 |author=Dr. Ian Cutress |date=December 14, 2021 |website=anandtech.com |publisher=[[AnandTech]] |access-date=March 3, 2022 |quote= |archive-date=2022-04-22 |archive-url=https://web.archive.org/web/20220422155308/https://www.anandtech.com/show/17102/snapdragon-8-gen-1-performance-preview-sizing-up-cortex-x2/2#:~:text=The%20small%20frequency%20bump%20from,efficiency%20when%20running%20these%20workloads. }}</ref>|hypertransport-fast-unit=|fastest=3.92 [[GHz]]<ref name=AnandTech />|dmi-fastest=|image=|fsb-slowest=|fsb-fastest=|fsb-slow-unit=|fsb-fast-unit=|hypertransport-slowest=|hypertransport-fastest=|hypertransport-slow-unit=|successor=[[ARM Cortex-X3]]}}<br />
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'''ARM Cortex-X2'''是一個基於[[ARM架構|ARMv9-A]]64位[[指令集架構]]設計的[[中央处理器|中央處理器]]以及[[ARM處理器內核列表|ARM內核]]。由[[安謀控股]]旗下[[奧斯汀]]設計中心的奧斯汀團隊設計，而且是ARM Cortex-X 定製 (CXC) 計劃的一部分<ref name=":1">{{Cite web|title=Cortex-X Custom CPU program|url=https://www.arm.com/products/cortex-x|access-date=2021-12-02|last=Ltd|first=Arm|website=Arm {{!}} The Architecture for the Digital World|language=en|archive-date=2022-04-16|archive-url=https://web.archive.org/web/20220416164631/https://www.arm.com/products/cortex-x}}</ref>。<br />
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== 與ARM Cortex-X1的架構變化 ==<br />
[[ARM Cortex-X1]]與Cortex-X2的變化有：<ref>{{Cite web|title=Arm Launches Its New Flagship Performance Armv9 Core: Cortex-X2|url=https://fuse.wikichip.org/news/5269/arm-launches-its-new-flagship-performance-armv9-core-cortex-x2/|access-date=2021-12-03|date=2021-05-25|website=WikiChip Fuse|language=en-US|archive-date=2022-04-22|archive-url=https://web.archive.org/web/20220422155309/https://fuse.wikichip.org/news/5269/arm-launches-its-new-flagship-performance-armv9-core-cortex-x2/}}</ref><ref>{{Cite web|title=Arm Announces Mobile Armv9 CPU Microarchitectures: Cortex-X2, Cortex-A710 & Cortex-A510|url=https://www.anandtech.com/show/16693/arm-announces-mobile-armv9-cpu-microarchitectures-cortexx2-cortexa710-cortexa510|access-date=2021-12-03|last=Frumusanu|first=Andrei|website=www.anandtech.com|archive-date=2022-04-24|archive-url=https://web.archive.org/web/20220424025012/https://www.anandtech.com/show/16693/arm-announces-mobile-armv9-cpu-microarchitectures-cortexx2-cortexa710-cortexa510}}</ref><ref>{{Cite web|title=Documentation – Arm Developer|url=https://developer.arm.com/documentation/101803/0200/|access-date=2021-12-03|website=developer.arm.com|archive-url=https://web.archive.org/web/20211203013119/https://developer.arm.com/documentation/101803/0200/|archive-date=2021-12-03|url-status=live}}</ref><br />
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* 調度階段從2個週期減少到1個週期，并且流水線從11條減少到10條<br />
* [[重排序缓冲区|重排序緩衝區]]增加了30%，從224個增加到288個<br />
* dTLB從40個增加到48個，增加了 20%<br />
* 支持 SVE2 SIMD <br />
* 支持Bfloat16數據類型<br />
* 不再支持[[ARM架構|Aarch32]]<br />
* 將具有8MB L3緩存的Cortex-X2與有4MB L3緩存的ARM Cortex-X1進行比較<br />
** 整數性能提高16%<br />
** 機器學習性能提高100%<br />
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== 上市產品 ==<br />
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* [[聯發科技|聯發科]] [[聯發科技天璣#天璣9000系列|天璣9000/9000+]]<ref>{{Cite web|title=Summit Dimensity9000{{!}} Latest 5G Snapdragon Processor {{!}} Qualcomm|url=https://www.qualcomm.com/products/snapdragon-8-gen-1-mobile-platform|access-date=2021-12-02|date=17 November 2021|website=i.mediatek.com|archive-date=2022-03-07|archive-url=https://web.archive.org/web/20220307164606/https://www.qualcomm.com/products/snapdragon-8-gen-1-mobile-platform}}</ref><br />
* [[Qualcomm|高通]][[高通驍龍元件列表#骁龙8/8+ Gen 1|驍龍8/8+ Gen 1/7+ Gen 2]]<ref>{{Cite web|title=Qualcomm Snapdragon 8 Gen 1 Mobile Platform {{!}} Latest 5G Snapdragon Processor {{!}} Qualcomm|url=https://www.qualcomm.com/products/snapdragon-8-gen-1-mobile-platform|access-date=2021-12-02|date=17 November 2021|website=www.qualcomm.com|archive-date=2022-03-07|archive-url=https://web.archive.org/web/20220307164606/https://www.qualcomm.com/products/snapdragon-8-gen-1-mobile-platform}}</ref><br />
* [[三星集团|三星]] [[三星Exynos|Exynos 2200]]<ref>{{Cite web|title=Exynos 2200 &#124; Processor|url=https://www.samsung.com/semiconductor/minisite/exynos/products/mobileprocessor/exynos-2200/|access-date=2022-03-26|archive-date=2022-01-24|archive-url=https://web.archive.org/web/20220124223029/https://www.samsung.com/semiconductor/minisite/exynos/products/mobileprocessor/exynos-2200/}}</ref><br />
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== 拓展阅读 ==<br />
[[ARM Cortex-A710]]<br />
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== 參考文獻 ==<br />
{{Reflist}}<br />
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{{ARM晶片}}<br />
[[Category:微架构]]<br />
[[Category:ARM架構]]</div>
~2026-19096-82