编辑“︁RISC-V”︁（章节）

==RISC-V处理器==
===商業實現===
====阿里巴巴玄铁910====
[[File:C910-uArch.png|thumb|玄铁 C910 微架構]]
[[阿里巴巴集团|阿里巴巴]]旗下半导体公司[[平头哥]]发布了它的首款 RISC-V 处理器「玄铁 910」（XuanTie910），名字取自[[金庸]]小说《[[神雕侠侣]]》。阿里巴巴称它是目前性能最强的 RISC-V 处理器，支持16核，主频 2.5GHz，单核性能达到 7.1 Coremark/MHz。阿里巴巴称其性能突破源自两大创新：一是它采用3发射8执行的复杂[[乱序执行]]架构，是业界首个实现每周期 2 条内存访问的 RISC-V 处理器；二是它基于 RISC-V 扩展了 50 餘条指令，系统性增强了 RISC-V 的计算、存储和多核等方面能力。<ref>{{cite web |title=阿里巴巴发布首款 RISC-V 处理器 |url=https://www.solidot.org/story?sid=61487 |website=科技行者 |accessdate=2019-07-25 |archive-date=2019-07-25 |archive-url=https://web.archive.org/web/20190725102020/https://www.solidot.org/story?sid=61487 |dead-url=no }}</ref>

2021年平头哥半导体釋出玄铁C910處理器開源項目<ref>{{cite web |title=openc910 |url=https://github.com/T-head-Semi/openc910 |website=Github |accessdate=2023-01-10 |dead-url=no |archive-date=2023-01-10 |archive-url=https://web.archive.org/web/20230110105039/https://github.com/T-head-Semi/openc910 }}</ref>，同時還發布出C910的LLVM编译器源代碼。<ref>{{cite web |title=c910-llvm |url=https://github.com/isrc-cas/c910-llvm |website=Github |accessdate=2023-01-10 |dead-url=no |archive-date=2023-01-10 |archive-url=https://web.archive.org/web/20230110105036/https://github.com/isrc-cas/c910-llvm }}</ref>

====SiFive公司的RISC-V半導體IP核系列====
RISC-V創始人所創辦的SiFive公司提供一系列RISC-V[[半導體IP核]]，包含高性能、高效能、低功耗及嵌入式RISC-V处理器。<ref>{{cite web |title=RISC-V Portfolio: SiFive Processors |url=https://www.sifive.com/risc-v-core-ip |website=SiFive |accessdate=2023-01-04 |dead-url=no |archive-date=2023-01-08 |archive-url=https://web.archive.org/web/20230108055045/https://www.sifive.com/risc-v-core-ip }}</ref>

==== 晶心科技的RISC-V CPU IP系列 ====
晶心提供可配置性高的32/64位元高效能CPU核心，包含DSP、FPU、Vector、超純量 (Superscalar)、亂序執行 (Out-of-Order)及多核心系列。<ref>{{Cite web|title=產品與解決方案|url=http://www.andestech.com/tw/%E7%94%A2%E5%93%81%E8%88%87%E8%A7%A3%E6%B1%BA%E6%96%B9%E6%A1%88/|access-date=2023-07-28|website=Andes Technology|language=zh-tw|archive-date=2023-07-28|archive-url=https://web.archive.org/web/20230728015526/http://www.andestech.com/tw/%e7%94%a2%e5%93%81%e8%88%87%e8%a7%a3%e6%b1%ba%e6%96%b9%e6%a1%88/|dead-url=no}}</ref>

===開源實現===
====中國科學院「香山」====
[[中國科學院]]計算所在2020年釋出「香山」高性能RISC-V處理器開源項目，香山以{{link-en|Chisel (硬件描述语言)|Chisel (programming language)|Chisel}}[[硬件描述语言]]([[Scala]][[领域特定语言]])開發。<ref>{{Cite web |url=https://github.com/OpenXiangShan/XiangShan |title=香山開源項目 |access-date=2021-07-06 |archive-date=2021-07-24 |archive-url=https://web.archive.org/web/20210724193151/https://github.com/OpenXiangShan/XiangShan }}</ref> <ref>{{Cite web |url=https://www.theregister.com/2021/07/06/xiangshan_risc_v/ |title=Chinese chip designers hope to topple Arm's Cortex-A76 with XiangShan RISC-V design |access-date=2021-07-06 |archive-date=2021-07-23 |archive-url=https://web.archive.org/web/20210723125230/https://www.theregister.com/2021/07/06/xiangshan_risc_v/ }}</ref> 第一版「雁栖湖架構」使用[[台積電]]的28nm製程，工作頻率為1.3GHz。<ref>{{Cite web |url=https://raw.githubusercontent.com/OpenXiangShan/XiangShan-doc/main/slides/20210622-RVWC-%E9%A6%99%E5%B1%B1%E5%BC%80%E6%BA%90%E9%AB%98%E6%80%A7%E8%83%BDRISC-V%E5%A4%84%E7%90%86%E5%99%A8.pdf |title=香山：开源高性能RISC-V处理器 |access-date=2022-05-16 |archive-date=2021-07-06 |archive-url=https://web.archive.org/web/20210706083613/https://raw.githubusercontent.com/OpenXiangShan/XiangShan-doc/main/slides/20210622-RVWC-%E9%A6%99%E5%B1%B1%E5%BC%80%E6%BA%90%E9%AB%98%E6%80%A7%E8%83%BDRISC-V%E5%A4%84%E7%90%86%E5%99%A8.pdf }}</ref>

====威騰電子「SweRV」====
[[威騰電子]]在2018年釋出SweRV RISC-V處理器開源項目<ref>{{Cite web |url=https://github.com/chipsalliance/Cores-SweRV |title=Cores-SweRV 開源項目 |access-date=2021-09-25 |archive-date=2022-05-07 |archive-url=https://web.archive.org/web/20220507034208/https://github.com/chipsalliance/Cores-SweRV }}</ref>，SweRV 目標應用環境為储存装置控制器，從開源以來已有多家廠商采用。<ref>{{Cite web |url=https://www.forbes.com/sites/tomcoughlin/2020/12/14/risc-v-and-marvell-technologies-advances-enable-storage-solutions/ |title=RISC-V And Marvell Technologies Advances Enable Storage Solutions |access-date=2021-09-25 |archive-date=2021-09-25 |archive-url=https://web.archive.org/web/20210925161552/https://www.forbes.com/sites/tomcoughlin/2020/12/14/risc-v-and-marvell-technologies-advances-enable-storage-solutions/ }}</ref>